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Platform-Wide Certification for TSMC's Latest Advanced-Process Technology MOUNTAIN VIEW, Calif., Sept. 11, 2017 /PRNewswire/ -- Highlights: • Design Compiler Graphical and IC Compiler II place-and-route validated on multiple 7-nm FinFET Plus high-performance production designs • PrimeTime and StarRC advanced variation modeling supporting 7-nm FinFET Plus low voltage and high-performance designs with enhanced physically-aware ECO technologies and efficient via pillar modeling • Support for multi-die integration using TSMC's CoWoS® technology increases productivity and accelerates time to volume Synopsys, Inc. () today announced that TSMC has certified the Synopsys Design Platform for the latest Design Rule Manual (DRM) of its 7-nm FinFET Plus process technology. Eyetoy Namtai Drivers Windows 10. Anchored around Synopsys' design implementation solutions of IC Compiler ™ II place-and-route system, this certification enables early customer access to TSMC's first mass-market extreme ultraviolet lithography (EUV)-enabled process. Building on the earlier certification this year for TSMC's 7-nm process technology, the Synopsys Design Platform has been utilized extensively in multiple production tape-outs across wide-ranging market, including high-performance computing (HPC) and mobile.